Total 130 job vacancies by Cadence

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Summary:

Join a growing and dynamic team and help lead the Design for Test activities for next generation of SoCs in advanced technology nodes. As part of the HSV SoC design team, you will be working to define and implement the Design-for-Test architecture and features for SoCs for Palladium® Emulation platforms in advanced technology nodes.

Key Responsibilities

• Define the DFT Architecture for the next generation SoCs.
• Implementation & verification including Scan, PMBIST, JTAG and other DFT’s related logic.
• Define and develop methodology for DFT insertion, pattern development, manufacturing tests, verifications, etc
• Working closely with cross functional teams to develop and verify DFT’s structures and constraints.
• Perform RTL and gate level (no-timing and timing) simulations to verify DFT functionality.
• Work closely with Test Engineering for test program development and Silicon bring up, diagnosis, Yield improvement, etc.
• Work closely with EDA RnD teams to propose and implement new features.

Requirements:

• B. Tech /BE/ME/M Tech with 8-15+ years of relevant hands-on experience in Design for Test (DFT).
• Clear understanding of key DFT concepts like Scan compression, Scan Stitching, fault models (stuck-at, delay tests, IDDQ, Small Delay, etc.), IEEE P1500, MBIST, IEEE 1149.1/6 (Boundary scan), IEEE 1687, etc.
• Working knowledge of RTL coding in Verilog, Synthesis & STA
• Experience in at least one scripting language like PERL, Python, TCL, or Shell is preferred.
• Hands on experience with either Tessent/Modus ATPG tool
• Proven success in development of complex custom ASIC products in advanced process nodes
• Hands-on experienced and successful taped out several ASICs.
• Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals.
• Excellent written and verbal communication skills.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We offer amazing opportunities to grow, no matter where you are in your career.

The ideal candidate will be energetic, innovative and enthused with how to help customers, solve their toughest Digital Implementation problems using Cadence technology. Will drive Pre-sales and Post–sales activities at advanced nodes for Cadence Digital IC products.

Key Responsibilities

• Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff
• Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
• Conduct technical presentations and product demonstrations
• Drive technical evaluations/benchmarks to success
• Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
• Drive adoption and proliferation of Cadence tools and technologies
• Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows
• Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements 
• Provide technical support, when developing business case for process improvement projects.
• Provide mentorship to junior engineers

Job Requirements

• Requires a BS or MS in EE with 12+ years industry related experience in design and EDA (Digital Implementation/Signoff)
• Understands ASIC Design implementation process and steps
• Strong hands-on experience with Place & Route (Innovus, ICC2, Fusion Compiler)
• Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler)
• Experience with EDA tools in the IC digital implementation & signoff flows (STA tools)
• Strong STA and SDC debugging abilities are required.
• Low power analysis, Clock design/analysis and hands-on 7/5nm technology node experience a plus.
• Automation skills using Perl, Tcl and shell scripting essential 
• Strong analytical & analysis skills covering digital implementation is critical. 
• Proven track record and experience working in a fast paced environment 
• Excellent customer interaction & presentation skills

Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success. 

#LI-MA1

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title:                                             Finance Manager      

Term of Contract:                              Permanent

Location:                                            Dublin 3

Reports to:                                         Finance Director, Dublin

Job Overview:

Finance Manager with people responsibility duties for country Financial Controllers as a member of the EMEA Controller Team, working in a shared services environment.

Job Responsibilities:

Managing a team of qualified accountants, overseeing their output and reviewing their work in the below areas:

• Financial accounting
• Monthly, Quarterly and Year end close
• Balance sheet reconciliations
• Ownership of balance sheet & profit and loss
• Quarter end reporting
• Fixed asset accounting for the entities
• US GAAP lease accounting for the entities
• Statutory audit and reporting
• US GAAP year-end audit clearance
• Corporate income tax returns
• Merger and acquisition accounting
• Tax audits and enquiries from tax authorities
• Tax compliance
• VAT compliance and reporting
• Cash flow and balance sheet forecasting
• Cash management
• Bank reconciliations
• Sarbanes-Oxley compliance for the entities
• M&A integration support
• Ensure financial processes are in accordance with and adhere to corporate policies

• Key role as part of Finance team with key interfaces with other internal customers and European controllers, A/P, A/R, Payroll, Cadence US treasury, US Corporate accounting, US Tax and local tax advisers.
• Ad hoc projects

Job Qualifications:

• Fully qualified accountant – ACA/ACCA
• 6-8 years PQE preferable
• People Management experience
• Fluent English
• Considerable experience of financial statement preparation
• Good working knowledge of GAAP

Additional Skills/Preferences:                     

• SAP experience
• US GAAP/MNC experience
• European language skills – not required but a bonus
• Ability to deliver to immovable deadlines with a high degree of accuracy
• Strong sense of responsibility for completion of deliverables to meet own objectives
• Ability to work within a matrix business structure with internal customers in multicultural environment with multiple locations and time zones

Behavioral Competencies:

Competency

Definition

Teamwork

• Both Supports others and asks for and receives help from others
• Understands and contributes to team objectives
• Constructively resolves conflicts with team members
• Gives opinions and listens to other member’s ideas during team meetings

Customer Focus

• Understand and acts on customer needs (including internal customers)
• Approaches work from the perspective of “what customer problems will I solve” by doing this?
• Works with “suppliers” to make sure that customer needs can be met

Accountability

• Is self-accountable for situations, attitudes, and behaviors
• Recognizes true intent of situations and owns their role in outcome whether positive or negative
• Self-examines and learns from outcomes
• Demonstrates willingness to renew attitudes and behaviors to achieve desired outcomes

Communication

• Communicates ideas, opinions, status, and suggestions to individuals & groups
• Written and verbal communications convey ideas and information in a concise, understandable, and grammatically correct manner, using appropriate style and tone

Leadership

• Takes responsibility for strategic action and initiatives
• Finds innovative solutions to Cadence problems (in business, people, and technology areas)
• Assesses alternative courses of action and seeks information needed to make timely decisions
• Makes effective and efficient decisions and aligns actions with values
• Participates in cross-group initiatives

Additional Information:

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace. 

Travel:                                                 <5%    

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence Silicon Solutions Group (SSG) is seeing rapid adoption of our industry leading Digital IP (intellectual Property), from processor cores and DSPs to Memory Controllers and IO solutions. Our configurable and extensible IP solutions are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Silicon Solutions.

Cadence SSG Team is hiring students to join our R&D teams in San Jose or Austin. This is an amazing opportunity to work at a world leader in computational software, semiconductor design IP, and system verification hardware.  Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.

Come be part of this great SSG Team where you can make an impact that is visible.  

Design Engineering Intern positions are for one of two roles:
(a) Perform as a member of the Logic Design Team on a Digital Design project such as an L2 Cache or a Network on Chip project. Responsible for the RTL implementation of high performance memory system and interconnect components. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.
(b) Perform as a member of the Design Verification Team on a Digital Design project such as an L2 Cache or a Network on Chip project. Responsible for verification of high performance memory system and interconnect components. Assist with developing test plans, writing functional assembly diagnostics, UVM/SVA monitors, debugging failures, and analyzing coverage information. Work closely with various RTL Design and Electronic Design Automation teams.

Position Requirements:
• Currently enrolled as MS/BS in Electrical Engineering, Computer Engineering, or a similar major.
• Deep understanding of Digital Design and/or Design Verification Fundamentals
• Excellent automation skills using Tcl, Perl, shell scripting
• Excellent oral and written communications skills
• Exposure to design automation tools is a plus

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

GCS AE Job Description Document

Job Title: Returnship – GCS

Location: Noida/Bangalore

Send profile to kmadhup@cadence.com
 

Special Internship (Returnship) of 6-months for Women candidates with prior experience and a minimum of 2-year gap/break for Application Engineer Role at Global Customer Success Team of Cadence Design Systems

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture builds and fosters diversity, equity and inclusion to maximize our ability to innovate, drive growth, and win with our customers. Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. 
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job Summary

Inviting applications from Women candidates for 6 months training program to enable re-entry to work as Application Engineer in Global Customer Success team at Cadence

Program involves a 6-month training (by our experienced Application Engineers) including In-Class and On the Job trainings which prepare candidate to work as an Application Engineer in Global Customer Success (GCS). GCS provides remote technical support to WW customers of Cadence in all its Software products. Application Engineers apply their expertise and debugging skills to quickly resolve customer issues, collaborate with R&D to ensure bug fixes, and create technical artifacts for Cadence Support Portal to enable customer self-help. The role requires continuous learning, excellent problem solving and communications skills”

As a member of the GCS Organization for the MSA (Multiphysics System Analysis) group, you will partner with world-wide Cadence customers to provide post sales technical consultation for Signal Integrity, Power Integrity, Electromagnetic Extraction and System level analysis products for implementing cutting-edge designs. This involves working closely with the customers to understand and debug complex issues enabling them to proceed further with design cycle phases, help them leverage the latest tool capabilities, and guide them with implementation of software in their design methodologies. You will have an opportunity to acquire both breadth and depth of technical knowledge, get wide exposure to the latest design practices in industry and demonstrate expertise by authoring high impact knowledge content.

This an excellent opportunity to work in a supportive, flexible, and friendly work environment that GCS offers, where we are vested in each other’s success, and are passionate about technology and innovation.

Job Responsibilities

• Provide technical support for Sigrity and Clarity products from the Multiphysics System Analysis (MSA) toolset of Cadence products with focus on productivity, and customer satisfaction

• Support multiple tools/methods for customer requiring general domain knowledge and developing business experience

• Assist in creation of high quality and impactful knowledge content in MSA domain

• Work independently at Cadence or customer facilities to deliver quality results according to schedule requirements
• Work on problems of moderate scope that may require analysis of situations, data or tool problems

Qualifications

• Minimum of 2 Years of break post the earlier experience
• Bachelor’s Degree in Electrical / Electronics / Electronics and Communication / Embedded System Engineering with 3-5 years related experience
• OR Masters with 1-3 years of related experience

Experience and Technical Skills required

• 3-5 years relevant industry experience in Signal and Power analysis of PCB and Packages, System level timing analysis for PCIe and DDRx designs, with SI and PI signoff tools, along with PCB schematic design and Layout implementation as designer or Analysis expert

• Strong background in Digital Design of PCB and packages, High-Speed PCB Design and analysis, EM extraction of S-parameters, Power IR drop analysis, fundamental Spice Circuit Design and Analysis, EMI/EMC analysis related to IC, Package, PCB and System level Designs

• Candidate should have experience in Sigrity platform tools including: PowerSI and 3DEM, SystemSI, Clarity3D or competitive tools like HFSS in these areas.

• Debugging of   signal and power analysis tools and results for system level sign-off.

• Understanding of PCB design toolsets of Cadence (Allegro/Capture/OrCAD/Pspice/Spectre); knowledgeable of at least 50% of a given tools; detailed knowledge in one CDN tool, learning others; ability to analyze customer's environment and evaluate appropriate support solutions; learning competitive tools/technologies

• Must have excellent debugging skills and ability to separate out the critical issues from trivial ones.

• Ability to solve interface level problems emanating from PCB Implementation side and System analysis side.

• Ability to debug and understand the power and thermal issues at System Level.

• Good understanding of Spice syntax, Spectre, Hspice, S-parameters, Computation Electromagnetics, DDRx and PCIe protocols and timing analysis is a plus

• Knowledge on TCL, Perl or Python scripting.

Behavioral skills required

• Must possess strong written, verbal and presentation skills
• Ability to establish a close working relationship with both customer peers and management
• Explore what’s possible to get the job done, including creative use of unconventional solutions
• Work effectively across functions and geographies
• Push to raise the bar while always operating with integrity

Regards

K Madhu Prasad (Madhu Reddy)

kmadhup@cadence.com
Hiring Team

www.cadence.com |

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Overview:

• Provide the link between the indirect sales channel (VAR) and Cadence quote to cash functions

• Process orders of all product types

• Ensure all internal controls are being met and take corrective action if required • Engage with VAR & VAR partner managers to resolve queries

• Ensure timely processing of orders and resolution of queries

• Collaborate with internal and external customers in order to develop best practices.

Job Responsibilities:

• Experience in order processing in high volume environment

• Strong written and verbal communication

• Good organization skills

• Proficient in use of Excel

• Ability to interface well with other departments • Experience with databases or record repository applications including SFDC

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Design Engineering Intern

The Cadence Tensilica Processor Team is seeing rapid adoption of our industry leading processor cores and DSP's. Our configurable and extensible processor cores are poised to meet the demands of intelligent IoT Devices at the edge of ML/AI Applications. We are already empowering many of the top chip and system companies with our Audio, Speech, AR/VR, ADAS, Vision and Imaging applications being driven with our processor cores. Today Cadence is shipping an astounding 8 Billion processor cores annually and expanding into intelligent system design and development.

Cadence Tensilica Processor Team is hiring graduates to join our R&D teams in San Jose and Austin. This is an amazing opportunity to work as a Graduate Engineer at a world leader in computational software, semiconductor design IP, and system verification hardware.  Our customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.

Come be part of this great Processor team where you can make an impact that is visible.  

Design Engineering Intern positions are for one of the three roles:
(a) Perform as a member of the Logic Design Team for Xtensa processors. Responsible for the RTL implementation of microprocessor cores, multiprocessor sub-systems and their peripherals. Implement the micro-architecture in Verilog RTL, simulate and debug its functions and run synthesis, place & route and other Electronic Design Automation scripts to meet timing, area, and power goals. Assist with developing test plans; writing functional diagnostics; debugging failures; and analyzing coverage information. Work closely with various Design Verification and Electronic Design Automation teams.
(b) Perform as a member of the Design Verification Team for Xtensa processors. Responsible for verification of microprocessor cores, multiprocessor sub-systems and their peripherals. Assist with developing test plans, writing functional assembly diagnostics, UVM/SVA monitors, debugging failures, and analyzing coverage information. Work closely with various RTL Design and Electronic Design Automation teams.

(c) Perform as a member of the Functional Safety Team for Xtensa processors. Responsible for Functional Safety features verification of microprocessor cores leading to certification for deployment of the cores in Automotive or Industrial systems. Assist with developing fault injection, writing functional assembly diagnostics, debugging failures, and analyzing coverage information. Work closely with various RTL Design teams.

Position Requirements:
• MS/BS in Electrical Engineering, Computer Engineering, or a similar major.
• Deep understanding of Digital Design and/or Design Verification Fundamentals
• Excellent automation skills using Tcl, Perl, shell scripting
• Excellent oral and written communications skills
• Exposure to design automation tools is a plus

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

DSP Design Verification Engineer

Position Description

Key member of the Tensilica DSP team within Cadence, responsible for design verification of DSP based hardware products as part of families of Tensilica DSPs and hardware accelerators, targeting various application domains such as computer vision, AR/VR, audio/voice, Radar, AI or ADAS/AD.

Be part of an agile team with experts in DSP architecture, design, implementation, and HW/SW verification. Gain understanding of the DSP algorithms and mathematical functions being implemented. Architect and implement verification environments and tests to ensure that the implementation is correct, there are no functional bugs, and the performance criteria were met. Design, implement and maintain large scale regression frameworks that improve quality and project execution time.

RESPONSIBILITIES:

• Collaborate with architecture/design team to understand the algorithms and mathematical functions.
• Define and develop detailed test plans.
• Develop tests in C/C++ to create a behavioral model of the DSP functions, using fixed point or floating point arithmetic.
• Develop and maintain extensible/large scale regression flows and infrastructure, including tools for aggregating metrics and trending.
• Develop System Verilog/UVM testbenches and checkers.
• Apply formal verification methodology for verification sign off and quality.
• Develop and apply novel techniques for verifying performance of designs.

Position Requirements:

• Knowledge of DSP arithmetic functions. Domain specific knowledge in Audio, Computer Vision, AR/VR, Radar or AI desirable but not necessary.
• Knowledge of computer architecture, especially hardware micro-architecture, processor pipelines and instruction sets.
• Familiarity with hardware verification concepts such as assertions, scoreboard, and some knowledge of System Verilog.
• Strong understanding of Software development.
• Proficiency in C/C++.
• Proficiency in any scripting language (Python or Perl preferred).
• Familiarity with source code control (Git/Perforce).
• Ability to work efficiently with remote teams on different time zones
• Ability to work successfully both independently and in a team environment
• Strong problem-solving skills, flexible, adaptable and proactive 
• Strong communication skills 
• MSEE, MSCS, or MSCE or equivalent.
• MS and 3+ years of working in a design or verification role, or some internship experience if pursuing a PhD.

The annual salary range for California is $128,100 to $237,900. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Technical pre-sales AE working with Cadence Analog Simulation and Environment Products, including Cadence Design Framework (DFII), Virtuoso Schematics, Analog Design Environment (ADE) and Spectre circuit simulation.  Minimum of 5-7 years of practical hands-on experience with analog simulation and Cadence design flow is required. Additionally, basic understanding of overall Analog and Mixed Signal design flows, ability to debug technical software and simulation issues is required. Working knowledge of Linux OS and environment, and experience with standard Unix scripting languages.  Knowledge of EMIR and layout design is a plus.

Responsibilities will include: 

• Conducting technical presentations, technical training, and product demonstrations to customers, including development of customized presentations as required.
• Supporting technical evaluations/benchmarks and drive the process to deliver Cadence solutions including debugging technical software and simulation issues as needed.
• Working closely with Sales Management to identify sales opportunities, prioritize them and help develop winning sales strategies.
• Developing an understanding of the customer's needs and also of the competition's technology to create solutions that best meet our customer needs.
• Communicating customer requirements and feedback to Cadence Engineering groups and Marketing for issue resolution and to improved product features and quality.

Key Skills to Succeed in this Position:

• Strong verbal and written communication skills
• Aptitude for organization, planning, and presenting
• Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment
• Interest and ability in learning new technologies
• Open to continued personal development to meet the evolving demands of the EDA industry

Some travel will be required and necessary. 

The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description:

- Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution including simulation, Emulation and Acceleration products.
- Plan, execute and manage key technical evaluations and benchmark with existing and potential customers.
- Conduct basic and advanced trainings, presentations and demos as necessary.
- Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.
- Understanding customer’s design and verification issues and provide Cadence solution
- Convert the customer’s requirements into a product specification
- Work with R&D to drive the specification into a real product; work with validation team to ensure the quality of the software

Requirements:

- Design or verification experience in IP or SoC chip level.

- Familiar with System Verilog/VHDL and HDL simulators

- Verification Methodology like UVM is required

- Knowledge of Unix and Linux is highly desired

- Strong verbal and written communication skills in English

- Strong teamwork skills with good human relationship

- Experience in EDA tools such as simulator, emulator or prototype, etc will be a plus

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• To develop & integrate foundry rule decks & technology files to support PDKs by using foundry provided process design kits as a starting point.
• PDK QA, verification and release methodology for decks and specialized setups including track patterns to aid in layout.
• Responsible for physical verification methodology, including installation, development, qualification, automation, and support –
  • To develop scripts to automate LVS, DRC, RM,IR and Parasitic Extraction flows.
  • And to support layout teams in verification flow issues.
• Ensuring QA of the integrated PDK’s with the custom design environment
  • Add sub scripts to improve efficiency on QA process with adequate coverage.
• General tool usage support – real-time support of all tools, creating bug workarounds and filing CCRs with R&D

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• To develop & integrate foundry rule decks & technology files to support PDKs by using foundry provided process design kits as a starting point.
• PDK QA, verification and release methodology for decks and specialized setups including track patterns to aid in layout.
• Responsible for physical verification methodology, including installation, development, qualification, automation, and support –
  • To develop scripts to automate LVS, DRC, RM,IR and Parasitic Extraction flows.
  • And to support layout teams in verification flow issues.
• Ensuring QA of the integrated PDK’s with the custom design environment
  • Add sub scripts to improve efficiency on QA process with adequate coverage.
• General tool usage support – real-time support of all tools, creating bug workarounds and filing CCRs with R&D

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Digital Electronics Engineering Intern, 3/6 months, 2024, Edinburgh

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Could you be our next prize-winning Intern?

At Cadence success is a habit. Our success extends to our Internship Program which consistently receives excellent feedback from Interns, and the technology sector: e-Placement Intern of the Year awards.

For 2024 we are again offering paid internships within our Intellectual Property Group (IPG) at the Cadence Edinburgh office, located on the top floor of our prime 40 Princes Street location, with picturesque views across Edinburgh.

Cadence, a world leader in Electronic Design Automation Tools & IP, is currently looking for talented Electronic & Electrical Engineering or Computing Science undergraduates for internship positions. The ideal candidates will be EE or CS students in their penultimate year, or a recent graduate, who are looking to work alongside our experienced Interface Controller Intellectual Property (IP) development team. The successful candidate will have the opportunity to be involved in the digital design and verification of leading edge IP, alongside a highly skilled team with over 25 years’ experience in the domain of digital electronics.

Position Requirements

The successful candidates will ideally have had exposure to the following ASIC Chip Design & Verification techniques:

• Verilog RTL Design
• Testbench Development
• Assertion Based Verification
• Object-Orientated Programming with Embedded or Digital Design experience

Experience with Unix, EDA tools and scripting languages such as Python or Perl would be a welcome addition. The internship positions are for 3 or 6 months.

Company Information

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence has been listed for eight consecutive years on the Fortune 100 Best Companies to Work For list. We are an equal opportunity employer committed to hiring a diverse workforce.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As a Senior Account Executive focused on the North America Mid-Atlantic Region, you will utilize your deep semiconductor technical knowledge, deep insight of the Customer, and broader Industry knowledge to maximize and monetize the value of Cadence solutions.  You will take responsibility of business-lines affiliated with technology domains and/or teams, develop the strategy and be accountable for execution while working with the wider Cadence team of both field and factory personnel.  You will need to rely on your relationships, knowledge, and superior communication skills to connect with business and technology customer stakeholders, identify critical customer challenges and gain buy-in to drive new business.

Key Qualifications

• BSEE and must be a US Citizen

• Must be comfortable in a technical setting and have an understanding of EDA tools, Semiconductor Design IP, Systems/PCB/IC design and the semiconductor manufacturing eco-system

• Must have ability to call “high” (Executive and Engineering Management) and help drive multi-million dollar, complex sales campaigns with multiple decision makers and influencers across the customer organization.

• Deep understanding of electronics systems and IC software design processes relevant to the customer ecosystem.

• The ability to foster and grow customer relationships throughout all levels of the customer organization to better connect our solutions with the customer's problems/business challenges and insure roadmap alignment for long term success.

• A proven track-record demonstrating ability to identify and understand customer pain-points and the ability to communicate this to a broad range of technical and non-technical persons.

• Knowledge and demonstration of the ability to manage the complete sales process, strong communication skills, and the ability to interact with engineering and financial staff at all levels.

• A track record successfully managing multiple priorities, working with and managing cross functional teams, and driving results as evidenced by overachievement of sales goals.

• Collaborate with other product line and technical sales and sales specialists to ensure a One Cadence approach.

• Interface and align with Cadence Business Unit leaders.

Additional Qualifications

Education/Experience Requirements;

• Education; MSEE or BSEE Degree

• 7+ years of professional experience in the electronics design business.

• 5+ years of experience in pre-sales roles.

• Verifiable track record of overachieving multimillion dollar sales quotas.

• Excellent organizational skills.

• Ability to travel (mainly eastern NA) 50%

• Home based but must be located within 200 miles of Washington DC

• US Citizenship required

• MBA is a plus

Location

• Preferred Mid-Atlantic NA Location (NJ, Pennsylvania, Maryland, Washington DC & Virginia)

#LI-MA1 

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Palladium Cloud Intern

Position Description:

As an integral member of the Palladium Cloud Team, you will work with our customers, AE team, FSE team, R&D groups to create a portal our Palladium and Protium products. This position will require knowledge of SQL, HTML, and scripting languages to build the database and portal/dashboard for HW Cloud assets and information. Position will require strong communication skills to work with various groups to assess, collect, and collate the necessary information.

Responsibility includes: 

• Creating online editable portal for HW Cloud
• Understanding Palladium and Protium telemetry information and incorporating data into overall database.
• Interfacing with FSE and AE team to create process for updating information to database.

Position Requirements:

• Currently enrolled as Masters student majoring in CE, CS, EE, or equivalent
• Proficiency in Unix/Linux scripting languages (ksh/bash/csh/perl).
• Knowledge of SQL, HTML, Python
• Knowledge of networking and how to debug networking issues
• Knowledge of how to install and configure OS’s (Redhat, Centos , Ubuntu, etc.)
• Excellent communication skills.  Must have ability to communicate complex issue to internal teams and customers in a clear and concise manner.

We’re doing work that matters. Help us solve what others can’t.