Total 7 Art / Design / Entertainment job vacancies in BELO HORIZONTE 02

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• The Lead Design Engineer’s primary responsibility will be the RTL design. This will include function and architecture definition, micro architectural specification, design, simulation, verification, and synthesis.

  Job Responsibilities:

  ·        Contribute to design, architecture and specifications of the IP blocks

  ·        Verify and debug IP blocks

  Job Qualifications:

  ·        BS or MS in Electrical Engineering or Computer Science

  ·        5+ years’ experience in microelectronics/EDA industry

  ·        RTL design experience desired with Verilog/System Verilog

  ·        Strong debugging and analytical skills

  ·        Digital architecture trade-offs for power, performance and area

  ·        Handling of multiple asynchronous clock domains and their crossings (CDC)

  ·        RTL lint checks and proper resolution of errors

  ·        Working knowledge of UNIX/Linux, shells, programming and scripting

  ·        Effective communication skills and ability to work remotely

  ·        Team player (fluent in English)

  ·        Must be legally eligible to work in Poland

  Additional Skills/Preferences:                          

  ·        Exposure to modern digital verification flows: functional coverage closure, metric-driven verification, formal verification, etc.

  ·        Knowledge of processor-based systems and embedded programming

  ·        Semiconductor IP design / FPGA design experience is beneficial

  ·        Working knowledge of leading protocols (i.e. PCIe, CXL, AMBA, AES, …)

  ·        Knowledge of cryptographic algorithms

  ·        Ability to use UVM

  Check what we can offer you:

  ·        Competitive salary package adequate to competencies 

  ·        Copyrights tax relief procedure implemented in salary calculations

  ·        Flexible working hours 

  ·        Work from office or hybrid 

  ·        Continuous professional development: trainings and seminars 

  ·        Possibility to cooperate with people from around the world in an expanding global organization 

  ·        Employee Stock Purchase Plan, bonuses and stocks 

  ·        Private medical care 

  ·        Life insurance 

  ·        Multisport Plus cards 

  ·        Social Fund benefits 

  ·        Recommendation bonuses & internal recognition program 

  ·        Additional paid days off and recharge days

  ·       And much more, so do not hesitate to contact us!

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is looking for a motivated person to work with the Digital and Signoff Group (TFO-DSG) on a hybrid mode in Belo Horizonte. As an application engineer, you will provide technical support, enabling customers to effectively deploy our industry-leading technology, focusing on logical and physical implementation products, and deploying technology using tools such as Genus, Modus, Innovus, Conformal, or Tempus. You will be on a team working with our customers to understand their needs, guide the best technologies and methodologies to enable their success, and produce innovative solutions to address our customers' most challenging problems. 

Job Description:

• Work together with global peers on diverse teams collaborating on the newest technologies.
• Collaborate with customer engineer's teams to verify problems, create solutions tests, and deliver final resolutions.
• Understand the competitive landscape and continuously work on differentiating Cadence's solutions.
• Develop collateral in support articles and application notes that customers and coworkers can use to excel in their responsibilities.

Requirements:

• Bachelor's degree in Electrical Engineering, Computer Science, and related areas.
• Verbal and written communication skills
• Problem-solving skills
• A strong interest in continuously learning new technologies and developing their soft skills

As a plus, the candidate could be exposed to:

• Verilog, VHDL, FPGA, Digital Systems or Microelectronics
• EDA tools for logical, physical synthesis or simulation
• Scripting languages, such as Tcl, Python, Bash, Cs

Information:

• CLT
• 40hrs/week.
• Hybrid: Belo Horizonte/MG
• Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems is looking for a candidate to join the Silicon Package Board (SPB) team as an intern focused on Advanced Packaging Design. If you like to architect and develop solutions for challenging problems in a fast and innovative paced environment, using state of the art technology this is a great opportunity.

This position is located in Belo Horizonte-MG.

Job Description:

 The Candidate will be trained on the Cadence Integrated Circuit (IC) Package Design tool set, working with state-of-the-art complex IC packaging of electronics using highly integrated IC package co-design and multi-die chiplet methodologies. Understand of competitive technologies is a plus. Ability to understand schematic, layout, interposers, integrated components.  

Key responsibilities in this position are to:

• Helping customers to adopt and proliferate our packaging solutions
• Conducting technical presentations, technical training, and product demonstrations, including development of customized presentations
• Supporting technical evaluations and benchmarks
• Help R&D and product engineers develop competitive and creative technical solutions

The ideal candidate will be self-motivated, have strong problem-solving skills and able to work independently with minimal supervision.

Minimum Requirements

• Enrolled on Electrical, Electronics, System Engineering, computer science or related areas on progress
• Excellent written and verbal communication skills
• Interest in learning new technologies
• Open to continued personal development to meet the evolving demands of the EDA industry
• One to two years to graduate

Nice to have skills

• Previous experience with Package or PCB Design
• Knowledge of EDA industry, Signal and Power Integrity
• Electromagnetics, and RF related to IC Package and PCB Design are desirable
• Ability to present and clearly articulate
• Knowledge of scripting programming languages such as Tcl, Perl, Python, bash, csh

Additional Job Details:

• Internship term: 20 hours/week
• Location: Av. do Contorno, 5800, Savassi - Belo Horizonte

About Cadence Design Systems:

Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com.

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

• Customer support, consulting and project management based on Cadence’s semiconductor design environment.

Main product：Allegro Package Designer Plus(APD Plus), Integrity 3DIC, Innovus, etc.

Qualification Requirements

• Majored in Electrical Engineering or some other equivalent

• Has the knowledge and desire to take on new challenges

Experiences/Skills

• At least 5 years of experience for PCB or package layout design and knowledge, or at least 5 years of experience for layout tool support.

• Programing experiences, such as SKILL, Perl, Tcl, Python etc.

• Have knowledge for 2.5D/3D-IC designs platform

• Good organization and communication skills between difference groups and customers.

• Communication skill and technical conversation in English.

• Must have business Japanese skill (N1 level, Minimum 3 years of business experience in Japan “using Japanese”).

We’re doing work that matters. Help us solve what others can’t.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• RTL coding and micro-architecture of complex RTL design blocks for high performance design.
• You will run lint, synthesis on the RTL design block to ensure high quality RTL which can meet timings at 1GHz + frequencies.
• You will support the Design verification team in debug and fix RTL issues in the blocks.
• You will help in identifying corner conditions and developing assertions for the RTL blocks to facilitate verification.

Required Skills:

• Writing RTL for state machines and controllers for DMA operations.
• Writing Logic for interfacing to complex memory subsystems with multiple banks and read/write ports and optimizing design for low latency and high bandwidth data transfers.
• Experience in design of logic for supporting on chip interfaces like AXI-4.
• Developing logic for control of registers/register files and logic supporting debug paths for CSR/memory read/write, profiling monitors.

Experienced in full chip integration of RTL blocks

B.E/B.Tech with 2 + years of experience or M.E/M.Tech

We’re doing work that matters. Help us solve what others can’t.

Date Posted:

Country:

Location:

Otis is An Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age or any other federally protected class. To request an accommodation in completing an employment application due to a special need or a disability, please contact us at careers@otis.com.

Privacy Policy and Terms:

Click on this link to read the Policy and Terms

1. Berkoordinasi dengan departemen terkait untuk menjalankan semua kegiatan yang berhubungan dengan visual branding baik online daan offline.
2. Menghasilkan visual desain sesuai dengan program-program yang dijalankan.