Total 12,973 job vacancies in Hong Kong

Job Description:

• Develop epitaxial processes for selective and non-selective growth of Ge and SiGe layers on Si substrates.
• Improve baseline processes for high-quality SiGe and Ge epitaxy: control uniformity and thickness and minimize threading dislocation density.
• Design epitaxial structures and develop processes for Ge and SiGe photodetectors (PD) and electro-absorption modulators (EAM) devices, integrating Ge/SiGe devices into Silicon photonic circuits.
• Troubleshoot to maintain tool and process quality. Prepare Standard Operating Procedures (SOPs), Out-of-Control Plans, and other technical documentation to maintain processes and tools.
• Perform metrology and characterization of SiGe and Ge epilayers (e.g., dopant and thickness uniformity, surface roughness, crystal quality, stress, carrier lifetime, etc.).
• Correlate SiGe and Ge crystal defects (type and density) with device performance and yield, and with device processing conditions.
• Provide technical support for technology transfer and process release requirements.
• Prepare technical presentations and papers for meetings, conferences and journals.

Requirements:

• PhD degree in Materials Science and Engineering, Physics, Chemical Engineering, Chemistry, Microelectronics Engineering, or closely related fields are welcome to apply.
• Prior 3 to 5 years direct experience in SiGe/Ge epitaxy and materials characterization.
• Working knowledge and prior hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, and problem-solving methods, is desired.
• Understanding of epitaxial system hardware is advantageous.
• Knowledge and prior hands-on experience on basic process characterization techniques such as SEM/TEM, EDX, SIMS, AFM, Ellipsometry is advantageous.
• Possess good interpersonal and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.

Job Description:

• Develop epitaxial processes for selective and non-selective growth of Ge and SiGe layers on Si substrates.
• Improve baseline processes for high-quality SiGe and Ge epitaxy: control uniformity and thickness and minimize threading dislocation density.
• Design epitaxial structures and develop processes for Ge and SiGe photodetectors (PD) and electro-absorption modulators (EAM) devices, integrating Ge/SiGe devices into Silicon photonic circuits.
• Troubleshoot to maintain tool and process quality. Prepare Standard Operating Procedures (SOPs), Out-of-Control Plans, and other technical documentation to maintain processes and tools.
• Perform metrology and characterization of SiGe and Ge epilayers (e.g., dopant and thickness uniformity, surface roughness, crystal quality, stress, carrier lifetime, etc.).
• Correlate SiGe and Ge crystal defects (type and density) with device performance and yield, and with device processing conditions.
• Provide technical support for technology transfer and process release requirements.
• Prepare technical presentations and papers for meetings, conferences and journals.

Requirements:

• PhD degree in Materials Science and Engineering, Physics, Chemical Engineering, Chemistry, Microelectronics Engineering, or closely related fields are welcome to apply.
• Prior 3 to 5 years direct experience in SiGe/Ge epitaxy and materials characterization.
• Working knowledge and prior hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, and problem-solving methods, is desired.
• Understanding of epitaxial system hardware is advantageous.
• Knowledge and prior hands-on experience on basic process characterization techniques such as SEM/TEM, EDX, SIMS, AFM, Ellipsometry is advantageous.
• Possess good interpersonal and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.

Job Description:

• Be a member of the leadership team to achieve the vision and mission of the National GaN Technology Centre (NGTC).
• Lead the Technology, Engineering and Industry team in technology road mapping and R&D pathfinding in device architecture, fabrication process technology, and MMIC design.
• Lead the Technology team, which comprises (a) characterization & modelling, (b) MMIC design, testing & model validation, (c) device failure and reliability analysis, (d) ultra high frequency GaN-on-SiC device design, layout, fabrication and characterization, and (e) low voltage GaN-on-Silicon device design, layout, fabrication and characterization.
• Coordinate with the Engineering team to develop ultra high frequency devices, ultra low voltage devices, and their MMICs.
• Coordinate with the Engineering and Operations teams to ensure timely delivery of the projects.
• Initiate and secure research grants and industry funding.
• Initiate, coordinate and manage research collaborations with IHLs and industry partners.
• Provide regular progress report of the Technology team’s activities to NGTC management.
• Represent NGTC in customer meetings.

Requirements:

• PhD in Electrical & Electronic Engineering, Materials Science and Engineering, Microelectronics Engineering, or closely related fields are welcome to apply.
• Deep understanding of GaN-HEMT device physics and GaN-based MMICs.
• At least 15-20 years of post-PhD hands-on experience in GaN HEMT and MMIC technology development including design, characterization (e.g. DC, small-signal and load-pull measurement), and modelling; preferably in RF GaN-on-Silicon or GaN-on-SiC technologies.
• At least 8 years of experience in leading a team of research engineers/scientists in managing multiple projects.
• Candidates with industry experience in GaN related R&D would be preferred.
• Working knowledge and hands-on experience in Design of Experiments (DOE) methodologies, statistical root cause analysis, problem-solving methods, and in-line metrology techniques is desired.
• Possess strong leadership, project management, interpersonal and oral/written communication skills.

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

As part of IME’s Photonics & Sensors Department, the candidate will take lead of the development of various testing capability for advanced photonics, including but not limited to chip-level and wafer-level testing of optical devices and electro-optical devices at high RF frequencies, as well as the testing of electro-optical sub-modules and sub-systems. You will work closely with an excellent multidisciplinary team working on advanced photonics.

Responsibilities:

• Develop various photonics testing capabilities for both chips and wafers, including design and building of measurement setups
• Perform chip-scale and wafer-scale data collection for OE, EO and OO devices from frequency range of 0 to 110 GHz
• Optimize data acquisition and analysis process to improve test efficiency, e.g. automation of measurement processes for wafer-scale testing and corner analysis
• Manage photonics laboratory including facilities, health and safety, equipment calibration, inventory and stocktake
• Take the lead to procure laboratory equipment and consumables
• Prepare technical presentations and papers for internal meetings, as well as conferences and journals
• Collaborate with project team to ensure quality and on-time delivery for various projects
• Performs other duties as assigned.

Qualifications:

• Bachelor’s or master’s degree in Physics, Electronic/Electrical Engineering, Photonics, Opto-electronics or equivalent
• More than 3 years hands-on experience in active photonics/optoelectronic device testing, especially for high-speed optical modulator and photodetector devices and electronic-photonic integrated circuit.
• More than 3 years hands-on experiences in optical setup construction and semiconductor & optoelectronic device characterization
• Experienced on experimental data acquisition and analysis
• Skillsets in programming or instrument automation is a plus
• Strong skills in problem-solving, communication and providing technical presentations
• Industry experience and awareness is a plus

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Job Description:

Candidate will be part of Far-Backend Of Line (Far-BEOL) team of process module engineers, advancing specialty technologies at IME. His or her main roles and responsibilities include:

• Develop and support Chemical Mechanical Planarization (CMP) unit process capabilities for silicon photonics, flat optics, advanced packaging, MEMS, and wide bandgap semiconductor applications.
• Deliver innovations involving process methodologies, materials, or approach, and generate intellectual property related to various aspects of CMP.
• Participate as team member with process integration teams to actively support CMP process development, optimization and troubleshooting for various industry and grant projects.
• File patents/know-hows on new development activities.
• Publish research findings in prestigious journals and conferences.

Job Requirement:

• Masters with specialization in Electronics / Microelectronics / Materials Engineering / Chemical Engineering / Materials Science/ Chemistry / Physics or equivalent.
• Minimum 5 years of experience in CMP technologies, preferably in an industrial setting.
• Prior hands-on experience working on industry-scale 200 mm or 300 mm CMP equipment platforms (e.g., AMAT or Ebara platforms), with in-depth technical knowledge in process development, materials, and inline process control related to CMP.
• Knowledge of silicon photonics, advanced packaging, MEMS, or wide bandgap semiconductor technology platforms would be a plus, but not mandatory.
• Strong experimental design (DOE) and data analysis skills is preferred.
• Good interpersonal and strong demonstrated skills in collaborating with internal and external stakeholders.
• At least 2 years of demonstrated experience in managing projects of moderate complexity is preferred
• Good analytical skills and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.
• Self-driven with strong interest in next-generation applications of CMP technologies and industry trends.

Position:

Our team is starting an exciting project to develop RF/mm-wave ICs for the future of communication for Beyond-5G to 6G applications. We are looking for an exceptional candidate with relevant expertise to join us. Our team focuses on developing communication modules for both terrestrial and non-terrestrial needs. You will work at the Institute of Microelectronics (IME) to create the most advanced semiconductor technologies. You will collaborate with world-leading industries and academic institutions on innovative designs and strategic intellectual properties.

Job Responsibility:

• Benchmarking with datasheets, prior arts, and latest academic work.
• In-depth design and analysis with electrical/electromagnetic simulations.
• In-depth analysis of design robustness, optimization, and testability.
• In-depth presentations and report recording of design, layout, test and measurement, and fault analysis.
• Working independently, as a team, and with collaborators from industry and academic backgrounds.

Pre-requisites:

• A Master’s / PhD Degree in Electronics or Electrical Engineering and proven academic and industry experience are pluses.
• Experienced in designing RF/mmWave such as LNA, mixer, PA, buffer, transmission line, baluns, PLL, VCO, etc.
• Experienced in designing base-band/mixed-signal circuits, such as amplifiers, bandgap, ADC, DAC, etc., is a plus.
• Knowledgeable in design trade-offs at the circuit-level specification.
• Experienced in designing in CMOS and SiGe technology or any other technologies like RF-SOI and compound-semiconductor is a plus.
• Proficient in using Cadence and EM tools like ADS for EM circuit simulation, IC layout, LVS, and DRC verification.
• Familiarity with IC measurement and debugging and hands-on experience with RF/mmWave equipment such as spectrum analyzer, network analyzer, oscilloscope, and probe station.
• Good publication record with a strong awareness of state-of-the-art.
• Good communication and teamwork.

Job Summary

The mission of Pacific Reseller Operations is to be the voice of Reseller Channel within Operations to ensure our products are in the right places at the right time, supporting Sales and our Partners to achieve Apple’s financial goals. We are focused on managing our supply chain as efficiently as possible, in order to maximise sell through while aiming for a frictionless Channel fulfilment experience for our partners. Within the Reseller Operations team, the Channel Fulfilment Analyst is responsible for ensuring orders and returns are managed, executed and delivered on time and applying analytics and insights to streamline or automate fulfilment processes in support of Apple’s Weekly Channel Fulfilment to Resellers.

Description

• Independently process Order and/or Returns Management activities and manage Reseller inquiries (Order Cancellations, Repricing, Returns & Delivery Escalations) in accordance to Standard Operating Procedures (SOP), Target Service Levels (SLA) and SOX requirements
• Define and lead the rollout of New Product Introduction Order Management Activities such as System Configurations and Order Transition Plans when required
  Champion and continuously improve Channel Fulfilment, Order and/or Returns Management processes or Standard Operating Procedures (SOP) for sub-regions and/or lines of businesses
  Responsible for driving key fulfilment, cost, work driver and service level metrics (KPIs) by identifying and root causing issues, developing scalable preventive solutions and leading its rollout
• Participate and/or represent Regional/Global Capital Improvement Projects including Business Requirements Definition and User Acceptance Testing (UAT)
• Coach and train Channel Fulfilment Analysts on Fulfilment, Order and/or Returns Processes

Key Qualifications

• 4 years of experience in an Operations role such as Operations Management, Industrial Engineering, Returns & Delivery Management and/or Logistics. Experience in Order or Returns Management is preferred
• Strong verbal and written communicator with the ability to articulate complex issues, findings or analysis to senior management in a clear and concise manner
• Demonstrate attention to details, capability to manage and prioritise competing tasks and ability to deliver quality results under compressed timelines
• Proven analytical problem solver with ability to root cause complex issues using analytics to resolve and design short term remediation and/or long term improvement initiatives within and across functional departments
• Strong relationship management and interpersonal skills with the ability to build new and strengthen existing relationships with cross functional stakeholders and senior management
• Experience in customs and/or regulations within Asian countries is an added advantage
• Knowledge/experience of working on SAP is an added advantage
• Proven expertise with data analytics and visualisation tools such as Excel, Tableau, Macros etc

Education & Experience
Bachelor’s Degree in fields such as Engineering, Statistics, Mathematics, Operations, Business Management or Finance is preferred.

Responsibilities:

• Engage and manage various stakeholders (internal and external) expectations and communication.
• Collaborate with functional teams to conduct cleanroom/facility planning and layout
• Carry out physical area/ floor marking, coordinate with functional teams in tool purchase, movement (in/out), tool relocation plan, project timeline and capacity update.
• Perform risk analysis of various project options and outcomes
• Maintain and validate capacity/capital/space models to enable accurate assessment of wafer fabrication and operations loading needs
• Support operational efficiency improvement efforts (cycle time, OEE improvement, capacity optimization, space optimization)

Requirements:

• Degree in Engineering (Industrial & Systems Engineering), Mechanical, or relevant field;
• Proficient in AutoCAD 2D/3D and Simulation Tool preferred
• Proficient with Microsoft Words, Excel and PowerPoint proficiency
• Preferably to have industrial engineering experience in a semiconductor/ manufacturing environment
• Ability to work independently and team player to deliver in fast paced and collaborative environment

Responsibilities:

• Engage and manage various stakeholders (internal and external) expectations and communication.
• Collaborate with functional teams to conduct cleanroom/facility planning and layout
• Carry out physical area/ floor marking, coordinate with functional teams in tool purchase, movement (in/out), tool relocation plan, project timeline and capacity update.
• Perform risk analysis of various project options and outcomes
• Maintain and validate capacity/capital/space models to enable accurate assessment of wafer fabrication and operations loading needs
• Support operational efficiency improvement efforts (cycle time, OEE improvement, capacity optimization, space optimization)

Requirements:

• Degree in Engineering (Industrial & Systems Engineering), Mechanical, or relevant field;
• Proficient in AutoCAD 2D/3D and Simulation Tool preferred
• Proficient with Microsoft Words, Excel and PowerPoint proficiency
• Preferably to have industrial engineering experience in a semiconductor/ manufacturing environment
• Ability to work independently and team player to deliver in fast paced and collaborative environment

• We are a chip design service company invested by an international consortium and founded by a senior chip design technical team.
• The company is headquartered in Singapore and will take root in Singapore for long-term development.
• The company has strong R&D capabilities and its core technical team members all have more than 10 years of experience in chip design.
• We have rich industry experience and deep practical accumulation in ASIC design and business management.

Our office is located in one North and walking distance from MRT.

We Provide competitive salary and compensation package for the right candidate. We are work-life balance and friendly to employees with various benefit.

Job Description：

1. Works with the front-end design team to complete the chip floorplan , clock architecture, and powerplan .

2. Takes charge of the physical design tasks from the Netlist to the GDSII, including P&R, formal verification, static timing analysis, physical verification, power analysis, design for reliability and tapeout.

3. Researches the physical design methodology of advanced process nodes, and builds an automatic physical design platform.

Position Requirements:

1. Holds a bachelor's degree or above in electronic engineering, microelectronics, or computer science.

2. At least 5 years of work experience in the digital backend design field. Hands-on project experience is required. Tapeout experience at advanced technology is prefered. ( for excellect junior candidates with 3+ years experience will be considerated )

3. Those with experience in TCL , Perl or Python script development and familiar with EDA tool design will be plus.

4. Strong communication ability, good confidence and self-movitation.

5. Bilingual and with good teamwork spirit.

6. Salary is negotiable for excellent candidates.

Product area

Google Cloud accelerates every organization’s ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage Google’s cutting-edge technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.

Job description

As a Technical Solutions Consultant, you will be responsible for the technical relationship of our largest advertising clients and/or product partners. You will lead cross-functional teams in Engineering, Sales and Product Management to leverage emerging technologies for our external clients/partners. From concept design and testing to data analysis and support, you will oversee the technical execution and business operations of Google's online advertising platforms and/or product partnerships.

You will be able to balance business and partner needs with technical constraints, develop innovative, cutting edge solutions and act as a partner and consultant to those you are working with. You will also be able to build tools and automate products, oversee the technical execution and business operations of Google's partnerships, as well as develop product strategy and prioritize projects and resources.

Additional job description

As a Generative Artificial Intelligence (AI) Specialist, you will work with Product Development and Technical Sales teams as an Generative AI subject matter expert to bring Google Cloud AI products to customers and partners.

In this role, you will help prospective customers and partners understand the power of Google AI, explaining technical features, helping customers design architectures, build AI powered applications, and problem-solving any potential roadblocks. You will also have the opportunity to help customers leverage Google Cloud’s Generative AI services, including Large Language Models (LLM) and specialized Machine Learning (ML) hardware developed by Google, called Tensor Processing Unit.

Qualifications

Job responsibilities

• Work with the team to identify and qualify business opportunities, understand key customer technical objections, and develop the strategy to resolve technical blockers.
• Provide AI expertise to support the technical relationship with Google’s customers, manage product and solution briefings, create demos, proof-of-concept work, and partner directly with product management to prioritize solutions impacting customer adoption to Google Cloud.
• Recommend integration strategies, enterprise architectures, platforms, and application infrastructure required to implement a complete solution.
• Support developers, creators, and enterprises to leverage Google’s Generative Language APIs so they can build their own AI products in the future.
• Travel to customer sites, conferences, and other related events as needed.

Minimum qualifications

• Bachelor's degree in Computer Science, Software Engineering, other quantitative field (e.g., Physics, Mathematics, Statistics), or equivalent practical experience.
• 3 years of experience serving as a technical solution architect, technical solutions consultant, or any other technical client-facing role.
• Experience with one of the following areas: Generative AI, Large Language Models (LLMs), Big Data, Machine Learning.
• Experience with AI products, AI technologies, or AI infrastructure.
• Ability to communicate in English fluently in order to support customers.

Preferred qualifications

• Master's degree in Computer Science or a related technical field.
• Experience with building AI and machine learning solutions, Machine Learning Operation frameworks like Kubeflow, and leveraging specific machine learning architectures (e.g., deep learning, LSTM, etc.).
• Experience architecting and developing software or infrastructure for scalable, distributed systems, and with machine learning technologies.
• Understanding of AI Models, Large Language Models, and AI specialized infrastructure especially as it relates to AI trends and issues within businesses.
• Understanding of responsible AI practice.
• Ability to learn, understand, and work with new emerging technologies, methodologies, and solutions in the Cloud/IT technology space.

Job Specifications

• Process accounts and incoming payments in compliance with financial policies and procedures
• Verifying, classifying, posting and recording accounts receivables’ data
• Generate reports detailing accounts receivable status
• Perform cash collection & cash count
• Update/offset receipts from customers
• Prepare bank deposits
• Ensure timely submission of Statement of Account (weekly / monthly)
• Facilitate payment of invoices due by sending bill reminders, follow up with customers on payments and contacting clients
• Liaise with sales team/customer service on clients’ billing issues, CN and payment discrepancies
• Assist in AP when required

Job Requirements

• At least LCCI or any other Professional Certificate/NiTEC in Accountancy or equivalent.
• Minimum 2 Year(s) of working experience in the related field.
• Knowledge in Navision system will be an advantage
• Proficient in Excel
• Positive and Hardworking

ROLE:
IME is leading the effort to establish the industry leading Silicon Carbide R&D program. This program aims to advance 200mm Silicon Carbide technologies in various areas, such as epitaxy, device design, process integration & fabrication, and power module packaging. The main objective is to drive disruptive innovations in power device research, with a specific focus on >1.2KV power MOSFETs. These innovations are intended to enhance automotive technologies, vehicle electrification, safety measures, sustainable energy grids, and industrial automation. Key aspects to demonstrate for this role include high power device design, novel device concepts, doping design, gate oxidation, and wide-bandgap process simulations. To achieve this, we are seeking individual with extensive industry experience in using Synopsys/Silvaco TCAD simulator, relevant device characterization skills, design simulation development abilities, a willingness to mentor junior staffs, and strong interpersonal skills. The candidate will contribute to the wide-bandgap & Silicon Carbide team by utilizing their device knowledge, guiding team on device characterization, implementing state-of-art Silicon Carbide power MOSFETs (Planar, Trench & Super-Junction), and innovative novel power MOSFETs for future applications.

RESPONSIBILITIES:

• TCAD modeling & simulation, novel high power device design, simulation, and device characterization

• Design and simulate high voltage Silicon Carbide MOSFETs (planar, trench, SJ MOSFET, IGBT) with a blocking voltage of >1.2K using Synopsys/Silvaco simulator

• Design & simulate practical and effective junction terminations

• Provide guidances on device structure, optimizing cell, power/performance analysis, process risk assessment, and recommendations for experimental split and improvement

• Develop and apply fundamental MOS device physics-based TCAD modelling & electric field management to calculate band structure, carrier transport, blocking voltage,
switching properties, and thermal management for vertical power devices in the presence of interface state density, gate oxide defects, and defects in Silicon Carbide

• Model transport and carrier scattering in devices operating in extreme ambient conditions

• Collaborate with diverse teams, including process integration, characterization, and circuit design engineers, to analyze and troubleshoot device-related issues during
development

• Serve as a resource for colleagues with less experience, and lead small projects with manageable risks and resource requirements

• Work closely with both internal and external customers to understand customer issues and align their demands. And grow this wide-bandgap team to ~5 headcounts in the
next 3 years.

JOB REQUIREMENTS:

• PhD in Electrical Engineering or related field

• >10 years industrial experience for high power device design and modeling

• Deep knowledge of high voltage, high power MOSFETs (including Planar, Trench, S-J MOSFETs, and IGBTs) design and device characterization on 4H-SiC & GaN substrates.

• Solid understanding of wide-bandgap semiconductor materials and the strong physics of MOSFET devices

• Ability to teach and transfer knowledge to junior staff members

• Ability to effectively communicate and plan with customers regarding their needs, issues, and demands

As part of IME’s Photonics & Sensors Department, the candidate will take lead of the development of various testing capability for advanced photonics, including but not limited to chip-level and wafer-level testing of optical devices and electro-optical devices at high RF frequencies, as well as the testing of electro-optical sub-modules and sub-systems. You will work closely with an excellent multidisciplinary team working on advanced photonics.

Responsibilities:

• Develop various photonics testing capabilities for both chips and wafers, including design and building of measurement setups
• Perform chip-scale and wafer-scale data collection for OE, EO and OO devices from frequency range of 0 to 110 GHz
• Optimize data acquisition and analysis process to improve test efficiency, e.g. automation of measurement processes for wafer-scale testing and corner analysis
• Manage photonics laboratory including facilities, health and safety, equipment calibration, inventory and stocktake
• Take the lead to procure laboratory equipment and consumables
• Prepare technical presentations and papers for internal meetings, as well as conferences and journals
• Collaborate with project team to ensure quality and on-time delivery for various projects
• Performs other duties as assigned.

Qualifications:

• Bachelor’s or master’s degree in Physics, Electronic/Electrical Engineering, Photonics, Opto-electronics or equivalent
• More than 5 years hands-on experience in active photonics/optoelectronic device testing, especially for high-speed optical modulator and photodetector devices and electronic-photonic integrated circuit.
• More than 5 years hands-on experiences in optical setup construction and semiconductor & optoelectronic device characterization
• Experienced on experimental data acquisition and analysis
• Skillsets in programming or instrument automation is a plus
• Strong skills in problem-solving, communication and providing technical presentations
• Industry experience and awareness is a plus

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Oracle Cloud Infrastructure (OCI) has been the platform of choice for running AI-Generative AI workloads (LLM Development, model training/fine tuning and inferencing) at scale. Cutting-edge companies doing LLM development such as Mosaic ML, Adept AI, Cohere plus 30 other AI development companies have signed contracts to purchase more than $14 billion of capacity in Oracle's Gen2 Cloud (OCI). NVDIA themselves are using OCI’s RDMA cluster networking technology for their AI infrastructure. To drive market success of this offering, we are investing in building a team of highly motivated & talented individuals across Asia Pacific.

About the job

We are looking for an AI-Generative AI Solutions Architect who will be a Subject Matter Expert (SME) and thought leader to help customers in designing solutions that leverage our Generative AI services and GenAI infrastructure. You will interact with customers directly to understand their business problem, and guide them in implementation of generative AI solutions, delivering briefing and deep dive sessions, and advise them on adoption patterns and paths for generative AI.

As part of the Customer Strategy and Specialist AI JAPAC Team, you will work closely and support the OCI Cloud sales and engineering teams in incubating, piloting, and deploying OCI Generative AI Service and Generative AI infrastructure, with enterprises, AI Labs and AI startups. You will develop reference architectures, use cases implementations, white papers, blogs, and presentations to enable customers and partners to fully leverage Generative AI services and infrastructure on OCI.

You must have practical technical experience working with technologies related to large language models including LLM architectures, model evaluation, and fine-tuning techniques. You should be proficient with design, deployment, and evaluation of LLM-powered agents, RAG techniques and GenAI. You should understand the security and compliance requirements for ML/GenAI implementations. A good understanding the Startups, Digital Native and DevOps eco-system would be a plus.

Key responsibilities

• Demonstrate how OCI Cloud is differentiated by working with customers, demonstrating features, tuning models, optimizing model performance, profiling, and benchmarking.
• Build repeatable technical assets such as workshops, scripts, reference architectures to facilitate adoption of OCI AI-GenAI portfolio
• Architect end-to-end GenAI solutions with a focus on LLMs and RAG workflows.
• Evangelize OCI GenAI services and share best practices through medium including events/public forums, blogs, white papers, reference architectures, …
• Mentor and enable OCI field Cloud Engineers on GenAI solutions to scale awareness and adoption thru PoCs, workshops, customer, partner enablement
• Travel as needed.

Qualifications

• Minimum of 10 years of experience in software engineering, cloud engineering, modern data platforms, systems architecture, design, and implementation.
• Knowledge and experience with AI and GenAI platforms, solutions, specialized infrastructure, LLM design and use cases.
• Proven experience in designing and implementing solutions, including experience with relevant tools and technologies. Excellent analytical and problem-solving skills, with the ability to identify and resolve complex technical issues related to AI, ML, and GenAI applications.
• Proficiency in programming languages (e.g., Java, Python) and databases (e.g., Oracle, MySQL), developing and executing AI over any of the cloud data platforms, associated data stores, Graph Stores, Vector Stores and pipelines.
• Knowledge of GPU cluster architecture and the ability to leverage parallel processing for accelerated model training and inference.
• Excellent communication and collaboration skills with the ability to articulate complex technical concepts to both technical and non-technical stakeholders.
• Experience delivering/leading workshops, training sessions, and presenting technical solutions to diverse audiences.