Total 3,353 process engineer job vacancies in D19 Serangoon Garden, Hougang, Sengkang, Punggol

Job Description: Semiconductor Process Integration Engineer

Position Overview: We are seeking a highly-skilled Process Integration Engineer to join our team. The primary responsibility of this role is to develop and deliver advanced process modules with our partner foundry facilities for optoelectronic integrated circuits (ICs). The ideal candidate will have a strong background in semiconductor process technology and a proven track record of working effectively with external partners.

Key Responsibilities:

1. Process Development: You will join an existing team to design and develop semiconductor process flows to for a proprietary CMOS + III-V monolithic integration platform. You will integrate various process modules into a cohesive manufacturing process, optimizing for performance, yield, and reliability.

2. Collaboration with Fab Partners: You will be responsible for management of projects under your purview with one or more fab partners, including aspects such as budgeting, schedule and resource planning. You will work closely with fab partners to develop, optimize, and implement process modules for optoelectronic ICs, ensuring compatibility with fab partner manufacturing protocols. You will provide technical support and feedback to fab partners, troubleshooting process-related issues and implementing corrective actions. You may also be embedded within the fab partner’s team for specific durations during critical phases of the process development effort.

3. Data Analysis: You will analyze process data to identify trends, root causes of issues, and opportunities for process improvements. You will also design experiments and test plans to retire technical risks and resolve process issues. You will also be responsible for maintaining detailed documentation of process development activities, including process flows, specifications, and test results.

Responsibilities:

• Be a member of the Process Engineering Team for top quality servers & storage products, maintain and update end to end production process & value stream mapping, cover end to end production process for better efficiencies thru process optimization, layout/work station enhancement as well as smart factory / automation projects
• Cooperate with the NPI PM team, Test Engineers, Quality, Production, Planning, Logistic and other departments to support production, including audit
• Support NPI ramp with propose new equipment, manage equipment readiness to support LVO, Engineering Change and customer requirement
• Ability to perform first level process issue triage and resolve issues locally where possible, analyze and identify process issue and deficiencies with follow up actions for resolution and improvement to meet goal for cost, quality and delivery.
• Escalate any process issue found to have major impact on quality, process and or cycle time if not able to resolve locally

Skills and Requirements:

• Bachelor’s Degree in Electrical / Electronics Engineering
• 3+ years of relevant work experience is preferred
• Strong IT background, experience with SAP is an advantage
• Technically know-how on Kaizen, 6 Sigma, PFMEA, DOE and/or 8D is a plus
• Experience with server & storage product is an advantage

OTHER INFO:-

• Work Location: 452 Alexandra Road, Singapore 119961 [Near Labrador Park MRT]
• Working Days / Hours: 8am to 5.30pm / 8.30am to 6pm (Mondays to Fridays)

-----------------------------------------------------------------------------

Celestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status (including race, religion, national origin, gender, sexual orientation, age, marital status, veteran or disability status or other characteristics protected by law).

At Celestica we are committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported. Special arrangements can be made for candidates who need it throughout the hiring process. Please indicate your needs and we will work with you to meet them.

COMPANY OVERVIEW:
Celestica (NYSE, TSX: CLS) enables the world’s best brands. Through our recognized customer-centric approach, we partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges. As a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development – from drawing board to full-scale production and after-market services for products from advanced medical devices, to highly engineered aviation systems, to next-generation hardware platform solutions for the Cloud.

Headquartered in Toronto, with talented teams spanning 40+ locations in 13 countries across the Americas, Europe and Asia, we imagine, develop and deliver a better future with our customers.

Celestica would like to thank all applicants, however, only qualified applicants will be contacted.

Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.

Job Responsibilities :

• Communicate, coordinate, and integrate department resources to enhance efficiency and achieve departmental goals and objectives.

• Oversee team member assignments, manage project scheduling, and track project progress to ensure timely and successful completion.

• Implement cost control measures and optimize resource allocation to maximize department performance.

• Foster team development through targeted training and mentorship programs, ensuring the success and growth of team members.

Job Qualification

• Master’s degree in a related field, such as Chemistry, Chemical Engineering, or Material Science.

• Over 5 years of relevant work experience.

• Strong knowledge of 12-inch semiconductor diffusion processes, including furnace, ion implantation, and Wet Bench System.

• Proven ability to identify, assess and solve problems

• Analytical with good interpersonal skills

• Team leader with execellent communication/coordination skill.

Job Responsibilities:

•Lots handling, WAT analysis and process optimization

•Device development, Yield trouble shooting and reliability improvement

•Fab transfer & Customers handling

•Customized structure process integration development

• To be responsible for helping to drive leading edge process/device development and optimization of devices in order to meet scaling, performance, reliability, and manufacturability requirements.

• Identify and solve IC process and device problems

Job Qualification

•Bachelor degree or above in Materials Science, Electrical Engineering, Chemical Engineering, Mechanical Engineering, Physics, Chemistry or a related engineer discipline.

• 5+ Years Experienced Process Engineering

• Fab 12" knowledge is preferred

• Knowledge of Statistical Process Control (SPC) and/or Design of Experiments (DOE) principles

•Good communication skills, be able to work within cross-functional teams, including internal and external partners

The New Product Introduction (NPI) process engineer will provide Dermcut Medical Pte Ltd with technical support and operating knowledge for our medical device operation. This role will conduct critical engineering functions such as product validation, troubleshooting, identifying and implementing process improvements.

The engineer will work closely with project manager and is in charge of taking the prototype from pilot scale into full scale manufacturing in support of commercial efforts. This position will focus on developing various processes and implementing those to support mass production.

Primary Responsibilities

• Establish processes based on product specifications.
• Develop control plans, gage repeatability & reproducibility, test method verification & validation, and pFMEA.
• Identify areas of process improvement to reduce and minimize process related nonconformance incidents and to maximize efficiency of the process.
• Co-ordinate the generation of dossier including but not limited to design files, technical files and project files to include design outputs, shelf-life studies, biocompatibility, sterilisation, risk analysis, validation master plans, IQ's, OQ's, PQ's and test regimes.
• Responsible for screening and optimization of process parameters to achieve robust and stable processes and maximize yields, efficiencies and process capabilities.
• Perform other related duties and responsibilities as assigned.

Education / Experience Requirements

• Bachelor’s degree in process engineering or similar qualification.
• A minimum of 2 years’ experience in the medical device industry.
• A strong understanding of validation strategy (IQ/OQ/PQ), support protocols and reports.
• Experience in root cause analysis of technical discrepancies/abnormalities.
• Familiar with FDA documentation requirements, ISO 13485 quality management system, lean manufacturing, and good manufacturing practice.
• Experience with SolidWorks and Microsoft Project preferred.

Job Description:

Candidate will be part of Far-Backend Of Line (Far-BEOL) team of process module engineers, advancing specialty technologies at IME. His or her main roles and responsibilities include:

• Develop and support Chemical Mechanical Planarization (CMP) unit process capabilities for silicon photonics, flat optics, advanced packaging, MEMS, and wide bandgap semiconductor applications.
• Deliver innovations involving process methodologies, materials, or approach, and generate intellectual property related to various aspects of CMP.
• Participate as team member with process integration teams to actively support CMP process development, optimization and troubleshooting for various industry and grant projects.
• File patents/know-hows on new development activities.
• Publish research findings in prestigious journals and conferences.

Job Requirement:

• Masters with specialization in Electronics / Microelectronics / Materials Engineering / Chemical Engineering / Materials Science/ Chemistry / Physics or equivalent.
• Minimum 5 years of experience in CMP technologies, preferably in an industrial setting.
• Prior hands-on experience working on industry-scale 200 mm or 300 mm CMP equipment platforms (e.g., AMAT or Ebara platforms), with in-depth technical knowledge in process development, materials, and inline process control related to CMP.
• Knowledge of silicon photonics, advanced packaging, MEMS, or wide bandgap semiconductor technology platforms would be a plus, but not mandatory.
• Strong experimental design (DOE) and data analysis skills is preferred.
• Good interpersonal and strong demonstrated skills in collaborating with internal and external stakeholders.
• At least 2 years of demonstrated experience in managing projects of moderate complexity is preferred
• Good analytical skills and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.
• Self-driven with strong interest in next-generation applications of CMP technologies and industry trends.

Job Description:

Candidate will be part of Far-Backend Of Line (Far-BEOL) team of process module engineers, advancing specialty technologies at IME. His or her main roles and responsibilities include:

• Develop and support Chemical Mechanical Planarization (CMP) unit process capabilities for silicon photonics, flat optics, advanced packaging, MEMS, and wide bandgap semiconductor applications.
• Deliver innovations involving process methodologies, materials, or approach, and generate intellectual property related to various aspects of CMP.
• Participate as team member with process integration teams to actively support CMP process development, optimization and troubleshooting for various industry and grant projects.
• File patents/know-hows on new development activities.
• Publish research findings in prestigious journals and conferences.

Job Requirement:

• Masters with specialization in Electronics / Microelectronics / Materials Engineering / Chemical Engineering / Materials Science/ Chemistry / Physics or equivalent.
• Minimum 5 years of experience in CMP technologies, preferably in an industrial setting.
• Prior hands-on experience working on industry-scale 200 mm or 300 mm CMP equipment platforms (e.g., AMAT or Ebara platforms), with in-depth technical knowledge in process development, materials, and inline process control related to CMP.
• Knowledge of silicon photonics, advanced packaging, MEMS, or wide bandgap semiconductor technology platforms would be a plus, but not mandatory.
• Strong experimental design (DOE) and data analysis skills is preferred.
• Good interpersonal and strong demonstrated skills in collaborating with internal and external stakeholders.
• At least 2 years of demonstrated experience in managing projects of moderate complexity is preferred
• Good analytical skills and oral/written communication skills, with ability to deliver clear and concise messages to both internal and external stakeholders.
• Self-driven with strong interest in next-generation applications of CMP technologies and industry trends.

What you will do

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek:

• Scan chain insertion & ATPG pattern generation
• Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.)
• Diagnosis to help manufacture process improvement

2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC:

• PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation
• Develop & integrate DFT-related RTL design modules to test chip

What you will bring

1. Master's Degree in EEE/ EE/ CE
2. Expertise in Synopsys and/or Mentor DFT tools, and HDL simulators like Synopsys VCS
3. Fluency in script language including but not limited to TCL/Perl/Python
4. Experience about MBIST with state-of-the-art SRAM structure & EDA tools is big plus
5. Skill for RTL design & integration, and physical failure analysis(PFA) will also be plus
6. Ability to think and work independently with different teams
7. Interest in understanding more details in entire design flow
8. Ability to use English for discussing technical details
9. More than 4-year industrial work experience is preferred

As a PDE Central Process Integration Principal Engineer, you will lead the development and integration of assembly and packaging processes for cutting-edge semiconductor products, such as DRAM, NAND, controllers, graphics, 3D-stacked (3DS) technologies, and High Bandwidth Memory (HBM). The ideal candidate will drive innovation in packaging technology and ensure seamless process integration during new product introductions.

This position involves working closely with multi-functional teams to research, design, and implement new packaging solutions while optimizing production yields and ensuring the successful commercialization of next-generation semiconductor technologies.

JOB RESPONSIBILITIES

Promote worldwide synergy

• Improve benchmark performance and efficiency gains through global project management and execution
• Network BKM leveraging and enhancement, business process creation and re-engineering
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Sites, TD, Product Engineering, Global Quality
• Help drive and fix the issue where necessary

Drive FE-AT Integration initiatives

• Business process governance between Fab – Assembly (WSPEC, FE2BE forum, WPSWAT)
• Lead & drive FE-AT excursions
• Yield, DPM related issues that involves both Fab – Assembly

Cross sites benchmark & achieve BIC yield performance

• Lead PI programs, PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow

Identify, Propose & Drive new initiatives programs

• Propose & lead strategic programs to shift left/ shorten cycle learning across TN phase (PD, NPI, HVM)
• Process flow simplifications & standardizations
• Cross technology streamline (Process, tools, etc)
• Sites expansions process & qualification requirements
• Drive roadmaps with multi-functional teams (FE, AT Procurement, APTD, APPDE)

JOB QUALIFICATIONS

• Bachelor's degree in Engineering (Electrical, Mechanical, Materials Science, or related field).
• 3+ years of experience in semiconductor packaging technology development, process integration, or new product introduction (NPI)
• Strong background in frontend fabrication processes (FAB)
• Proven experience in data analysis, statistical process control (SPC), and process optimization.
• Strong problem-solving skills, attention to detail, and a proactive approach to technology development.
• Excellent communication and teamwork skills, with the ability to work across departments and with external partners.
• Hands-on experience in the development and implementation of cutting-edge semiconductor packaging technologies.
• Experience leading multi-functional teams in process development, technology transfer, and ramp-up.
• In-depth knowledge of the latest industry standards and trends in semiconductor packaging and assembly.

As a PDE Central Process Integration (PI) Senior Engineer, you will lead the development and integration of assembly and packaging processes for cutting-edge semiconductor products, such as DRAM, NAND, controllers, graphics, 3D-stacked (3DS) technologies, and High Bandwidth Memory (HBM). The ideal candidate will drive innovation in packaging technology and ensure seamless process integration during new product introductions.

This position involves working closely with multi-functional teams to research, design, and implement new packaging solutions while optimizing production yields and ensuring the successful commercialization of next-generation semiconductor technologies.

JOB RESPONSIBILITIES

Promote worldwide alignment

• Improve benchmark performance and efficiency gains through global project management and execution
• Network BKM leveraging and enhancement, business process creation and re-engineering
• Maintain a strong and open relationship with peer group and managers in other functional areas within central team and outside in areas such as Sites, TD, Product Engineering, Global Quality
• Help drive and fix the issue where necessary

Drive FE-AT Integration initiatives

• Business process governance between Fab – Assembly (WSPEC, FE2BE forum, WPSWAT)
• Lead & drive FE-AT excursions
• Yield, DPM related issues that involves both Fab – Assembly

Cross sites benchmark & achieve BIC yield performance

• Lead PI programs, PI Loop taskforce and/or team in network to address yield and quality challenges, optimize process flow

Identify, Propose & Drive new initiatives programs

• Propose & lead strategic programs to shift left/ shorten cycle learning across TN phase (PD, NPI, HVM)
• Process flow simplifications & standardizations
• Cross technology streamline (Process, tools, etc)
• Sites expansions process & qualification requirements
• Drive roadmaps with multi-functional teams (FE, AT Procurement, APTD, APPDE)

Requirements

• Bachelor's degree in Engineering (Electrical, Mechanical, Materials Science, or related field).
• 3+ years of experience in semiconductor packaging technology development, process integration, or new product introduction (NPI)
• Strong background in frontend fabrication processes (FAB)
• Proven experience in data analysis, statistical process control (SPC), and process optimization.
• Strong problem-solving skills, attention to detail, and a proactive approach to technology development.
• Excellent communication and teamwork skills, with the ability to work across departments and with external partners.
• Hands-on experience in the development and implementation of cutting-edge semiconductor packaging technologies.
• Experience leading multi-functional teams in process development, technology transfer, and ramp-up.
• In-depth knowledge of the latest industry standards and trends in semiconductor packaging and assembly.

Keen on the role? Apply now!

Product area

The name Google came from "googol," a mathematical term for the number 1 followed by 100 zeros. And nobody at Google loves big numbers like the Finance team when providing in depth analysis on all manner of strategic decisions across Google products. From developing forward-thinking analysis to generating management reports to scaling our automated financial processes, the Finance organization is an important partner and advisor to the business.

Job description

The Finance Operations team manages Google's cash transactions on a global basis and ensures that Google's incoming and outgoing cash processes are controlled, effective and efficient. As a member of this team, you'll find innovative ways to manage our complex set of transactions. You'll make processes more efficient and scalable, work to ensure the highest level of quality of our operations, and proactively minimize operational risk. Externally, you collaborate with our extended workforce partners and internally, you will collaborate across the multiple areas of the Financial Operations team.

Additional job description

The Revenue to Cash Operations team manages Google's Revenue-to-Cash processes globally across all product areas, including Ads, Digital Goods, Cloud, and Hardware. We ensure Google’s revenues are transformed to cash in an efficient, controlled and compliant manner. Our team powers Google's ambitious growth agenda by creating innovative ways to manage our complex set of billing and payment transactions, making processes more efficient and scalable, minimizing operational risk, integrating Google acquisitions and new products, connecting with new payment and invoicing partners and so much more.

Qualifications

Job responsibilities

• Design the strategy for your area in line with the team's overall direction.
• Analyze complex datasets to understand ways to improve processes.
• Provide performance reporting and analysis to executive management and risk identification and mitigation.
• Collaborate with the Revenue to Cash Operations, Cash, and AR Management organization to ensure a high standard of execution for operational activities. This includes service level agreements, adherence to documented processes and quality of results.
• Articulate data and system requirements to supporting teams, this includes capacity planning and the appropriate allocation of resources.

Minimum qualifications

• Bachelor's degree or equivalent practical experience
• 7 years of experience in financial analysis, budgeting, operations, consulting, program management, process design, process improvement, or business process re-engineering
• 3 years of experience in data and analytics
• Experience using SQL or other scripting languages

Preferred qualifications

• MBA or Master's degree
• Experience in Order to Cash operations (Credit, Collections, Cash Operations)
• Experience with SAP
• Experience working in a cross-functional, fast-paced environment leading complex operational initiatives to successful outcomes
• Motivated, strong sense of end-to-end ownership, and a collaborative mindset

Role & Responsibilities:

• Responsibilities include diagnosing appropriate levels of metal/metal-alloy contaminations by oxygen and other contaminants; determining the root cause of contaminants, and establishing protocols for characterizations.
• Hands-on providing support for onsite metal PVD, including creating, running, and characterizing recipes to achieve the lowest resistances.
• Collaborates closely with equipment vendors and device engineers to optimize the metal-stack for device performances and robustness/reliability, from low to high temperatures.
• Lead data analysis related to implant-induced defects and cleaning issues on metal contacts with solutions development.
• Examines the work-functions of metal/metal-alloys suitable for Ohmic contact on SiC.
• Responsible for designing experiments for Ohmic contact on various SiC substrates with different doping types, determining their impact, and resolving issues to achieve the lowest specific contact resistances.
• Designing cleaning processes to obtain ideal Schottky diode using various metal/metal-alloys on SiC for high-performance applications.
• Work closely with cross-departmental and integration teams and in 3-5 years’ time develop a WBG backend process integration team of at least 4 persons.

Requirements:

• PhD Degree in Material Science, Physics, Electrical Engineering or related field.
• >8 years related industrial experience inclusing backend process module integration.
• Extensive hands-on experience in PVD (Physical Vapor Deposition) processing for metal depositions and interface tuning.
• Strong understanding of metal-semiconductor contact physics.
• Expertise in work-function tunings of metal and metal-alloy.
• Proficiency in modulating electron affinity through implantation or surface treatments of semiconductors.
• Familiarity with wide band-gap semiconductor materials and their interaction with metal/metal-alloys at various temperatures.
• Thorough fundamentals in Ohmic contact and Schottky diode physics, as well as the impact of defects and contaminations on electrical properties.
• Skilled at mentoring and transferring knowledge to junior staff members.
• Excellent communication skills to effectively address customers' needs, concerns, and solution requirements.

Role & Responsibilities:

• Responsibilities include diagnosing appropriate levels of metal/metal-alloy contaminations by oxygen and other contaminants; determining the root cause of contaminants, and establishing protocols for characterizations.
• Hands-on providing support for onsite metal PVD, including creating, running, and characterizing recipes to achieve the lowest resistances.
• Collaborates closely with equipment vendors and device engineers to optimize the metal-stack for device performances and robustness/reliability, from low to high temperatures.
• Lead data analysis related to implant-induced defects and cleaning issues on metal contacts with solutions development.
• Examines the work-functions of metal/metal-alloys suitable for Ohmic contact on SiC.
• Responsible for designing experiments for Ohmic contact on various SiC substrates with different doping types, determining their impact, and resolving issues to achieve the lowest specific contact resistances.
• Designing cleaning processes to obtain ideal Schottky diode using various metal/metal-alloys on SiC for high-performance applications.
• Work closely with cross-departmental and integration teams and in 3-5 years’ time develop a WBG backend process integration team of at least 4 persons.

Requirements:

• PhD Degree in Material Science, Physics, Electrical Engineering or related field.
• >8 years related industrial experience inclusing backend process module integration.
• Extensive hands-on experience in PVD (Physical Vapor Deposition) processing for metal depositions and interface tuning.
• Strong understanding of metal-semiconductor contact physics.
• Expertise in work-function tunings of metal and metal-alloy.
• Proficiency in modulating electron affinity through implantation or surface treatments of semiconductors.
• Familiarity with wide band-gap semiconductor materials and their interaction with metal/metal-alloys at various temperatures.
• Thorough fundamentals in Ohmic contact and Schottky diode physics, as well as the impact of defects and contaminations on electrical properties.
• Skilled at mentoring and transferring knowledge to junior staff members.
• Excellent communication skills to effectively address customers' needs, concerns, and solution requirements.

As a University of Applied Learning, SIT works closely with industry in our research pursuits. Our research staff will have the opportunity to be equipped with applied research skill sets that are relevant to industry demands while working on research projects in SIT.

The primary responsibility of this role is to deliver on an industry innovation research project where you will be part of the research team to optimize the spray drying processes for collagen and gelatine powder production, ensuring high-quality and consistent output.

Key Responsibilities

• Manage research project with Principal Investigator (PI), Co-PI and team members to ensure all project deliverables are met
• Participate in brainstorming and ideation, conduct research and experiments, create functional models, and maintain documentation of design development
• Develop system from embodiment of concept to detailed design of parts and assemblies, including selection of standard components, through application studies, analyses and calculations
• Organise procurement of required electrical and mechanical components as well as commercial devices
• Guide students to carry out assembly of submodules, integration of system and testing of machines
• Coordinate maintenance of associated equipment with POD technical officers when required
• Perform risk assessment, and ensure compliance with workplace safety and health regulations

Job Requirements

• Bachelor's degree or higher in mechanical engineering, or related field.
• Professional-level competency in mechanical system and part design
• Strong prototyping skills
• Proficiency in CAD software, such as SolidWorks or Creo Parametric
• Mechanical engineering degree
• Minimum design experience of 5 years

Key Competencies

• Show strong initiative and take ownership of work.
• Demonstrates expertise in experimental design and execution, with good analytical thinking and problem-solving skills.
• Able to build and maintain strong working relationships with people within and external to the university.
• Good communication and interpersonal skills.

What you will do

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek:

• Scan chain insertion & ATPG pattern generation
• Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.)
• Diagnosis to help manufacture process improvement

2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC:

• PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation
• Develop & integrate DFT-related RTL design modules to test chip

What you will bring

1. Master's Degree in EEE/ EE/ CE
2. Expertise in Synopsys and/or Mentor DFT tools, and HDL simulators like Synopsys VCS
3. Fluency in script language including but not limited to TCL/Perl/Python
4. Experience about MBIST with state-of-the-art SRAM structure & EDA tools is big plus
5. Skill for RTL design & integration, and physical failure analysis(PFA) will also be plus
6. Ability to think and work independently with different teams
7. Interest in understanding more details in entire design flow
8. Ability to use English for discussing technical details
9. With a minimum of 7 years relevant industrial work experience

About the company

MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.